DMA mode of data transfer is fastest and pins 39 and 38 (HOLD and HLDA) become active
only in this mode.
When DMA is required, the DMA controller IC (8257) sends a 1 to pin 39 of 8085. At
the end of the current instruction cycle of the microprocessor it issues a1 to pin 38 of
the controller. After this the bus control is totally taken over by the controller.
When 8085 is active and 8257 is idle, then the former is MASTER and the latter is
SLAVE, while the roles of 8085 and 8257 are reversed when 8085 is idle and 8257 becomes
active.
only in this mode.
When DMA is required, the DMA controller IC (8257) sends a 1 to pin 39 of 8085. At
the end of the current instruction cycle of the microprocessor it issues a1 to pin 38 of
the controller. After this the bus control is totally taken over by the controller.
When 8085 is active and 8257 is idle, then the former is MASTER and the latter is
SLAVE, while the roles of 8085 and 8257 are reversed when 8085 is idle and 8257 becomes
active.
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